Difference between revisions of "Example watchdog"
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| − | We have activated <code>watchdog</code> and | + | '''NOTE: The watchdog timer is counting down. We reset its countdown to keep the count from reaching zero, at which point it would reset the board. Also, the second sentence is vague.''' |
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| + | We have activated the <code>watchdog</code> and it is now counting down to computer reset - or rather it would be if we didn't keep resetting its timer. That's the LED on the SoM blinking at about 1 Hz. Every second <code>watchdog-test</code> is sending an IOCTL to the watchdog driver, which in turn ticks <code>watchdog</code> to reset its internal timer so it doesn't timeout and trigger a system reset. | ||
Now we will stop interrupting <code>watchdog</code> and let it trigger a computer reset. Hit CTRL-C. | Now we will stop interrupting <code>watchdog</code> and let it trigger a computer reset. Hit CTRL-C. | ||
Revision as of 11:38, 3 January 2014
This is a guide to the watchdog C example project included in the EMAC OE SDK.
A watchdog timer (WDT) is a hardware circuit that can reset the computer system in case of a software fault. This is an example test for the Linux watchdog API.
The watchdog project builds one executable: watchdog-test.
Opening, Building and Uploading the Project Files
stubbooo
Usage and Behavior
A watchdog timer is a hardware circuit that can reset the computer system in case of a software fault. The watchdog-test application can enable, disable, activate, configure and interrupt the watchdog timer.
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Activating watchdog invokes system reset (after timeout) |
Hardware Requirements
watchdog will run on any system for which it can be compiled and implements the standard Linux watchdog API.
watchdog Usage
./watchdog-test [-det]
- -d
- Disable watchdog.
- -e
- Enable watchdog.
- -t
- Set the watchdog timeout (to a value specified in code. Default is five seconds).
Usage Example. Activating watchdog with a periodic interrupt
This will activate watchdog and initiate a periodic interrupt to keep it from timing out.
root@som9g20:/tmp# ./watchdog-test
Watchdog Ticking Away!
NOTE: The watchdog timer is counting down. We reset its countdown to keep the count from reaching zero, at which point it would reset the board. Also, the second sentence is vague.
We have activated the watchdog and it is now counting down to computer reset - or rather it would be if we didn't keep resetting its timer. That's the LED on the SoM blinking at about 1 Hz. Every second watchdog-test is sending an IOCTL to the watchdog driver, which in turn ticks watchdog to reset its internal timer so it doesn't timeout and trigger a system reset.
Now we will stop interrupting watchdog and let it trigger a computer reset. Hit CTRL-C.
...and the system resets.
Usage Example. Disabling watchdog
root@som9g20:/tmp# ./watchdog-test -d
Watchdog card disabled.
...and the program exits normally.
Usage Example. Enabling watchdog
This will enable and activate watchdog but it won't perform a periodic timeout interrupt (see the first usage example, above). So when you run it the program activates watchdog and then watchdog resets the system.
root@som9g20:/tmp# ./watchdog-test -e
Watchdog card enabled.
...and the system resets.
Usage Example. Setting watchdog timeout
This will activate watchdog and set it to timeout in 5 seconds.
root@som9g20:/tmp# ./watchdog-test -t
Watchdog timeout set to 5 seconds!
...the program exits normally, then 5 seconds elapse, and then the system resets.
Summary
The watchdog C example project demonstrates how to use the watchdog timer. We provide examples of how to enable, disable, activate, configure and interrupt the watchdog hardware circuit.
