Example watchdog

TODO: {{#todo:Buggy(01.03.14-11:32->JG+);(01.03.14-11:42->MD-)|Jgreene|oe 4,oe 5,jg,md,Buggy}}

This is a guide to the watchdog C example project included in the EMAC OE SDK.

A watchdog timer (WDT) is a hardware circuit that can reset the computer system in case of a software fault. This is an example test for the Linux watchdog API.

The watchdog project builds one executable: watchdog-test.

Opening, Building and Uploading the Project Files

For information on opening the project from within Eclipse, please see Importing the EMAC OE SDK Projects with Eclipse. Then, follow Using the EMAC OE SDK Projects with Eclipse for information on how to build, upload and execute the example.

Alternatively, the Makefile can be used with the make command from the commandline to build and upload the example. For more information on this method, please see Using EMAC OE SDK Example Projects.

Usage and Behavior

A watchdog timer is a hardware circuit that can reset the computer system in case of a software fault. The watchdog-test application can enable, disable, activate, configure and interrupt the watchdog timer.

Activating watchdog invokes system reset (after timeout)

Hardware Requirements

watchdog will run on any system for which it can be compiled and implements the standard Linux watchdog API.

watchdog Usage

./watchdog-test [-det]

-d

Disable watchdog.

-e

Enable watchdog.

-t

Set the watchdog timeout (to a value specified in code. Default is five seconds).

Usage Example. Activating watchdog with a periodic interrupt

This will activate watchdog and initiate a periodic interrupt to keep it from timing out.

root@som9g20:/tmp# ./watchdog-test 
Watchdog Ticking Away!

NOTE: The watchdog timer is counting down. We reset its countdown to keep the count from reaching zero, at which point it would reset the board. The actual count is the number of seconds specified times a scalar, which may be 1,000 or more. This is because timing circuits of very short durations are very small and cheap to make, whereas one which doesn't time out until a full second has elapsed requires a rather large and pricey capacitor. You don't need to explain that to the reader, though. Additionally, the second sentence is vague.

We have activated the watchdog and it is now counting down to computer reset - or rather it would be if we didn't keep resetting its timer. That's the LED on the SoM blinking at about 1 Hz. Every second watchdog-test is sending an IOCTL to the watchdog driver, which in turn ticks watchdog to reset its internal timer so it doesn't timeout and trigger a system reset.

Now we will stop interrupting watchdog and let it trigger a computer reset. Hit CTRL-C.

...and the system resets.

Usage Example. Disabling watchdog

root@som9g20:/tmp# ./watchdog-test -d
Watchdog card disabled.

...and the program exits normally.

Usage Example. Enabling watchdog

This will enable and activate watchdog but it won't perform a periodic timeout interrupt (see the first usage example, above). So when you run it the program activates watchdog and then watchdog resets the system.

root@som9g20:/tmp# ./watchdog-test -e
Watchdog card enabled.

...and the system resets.

Usage Example. Setting watchdog timeout

This will activate watchdog and set it to timeout in 5 seconds.

root@som9g20:/tmp# ./watchdog-test -t
Watchdog timeout set to 5 seconds!

...the program exits normally, then 5 seconds elapse, and then the system resets.

Summary

The watchdog C example project demonstrates how to use the watchdog timer. We provide examples of how to enable, disable, activate, configure and interrupt the watchdog hardware circuit.