Difference between revisions of "EMAC SPI Programming"
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| − | {{todo|Write SPI Article; (12.4.13-15:35->MD+)|Michael Welling|project=oe 4,oe 5,mw, | + | {{todo|Write SPI Article; (12.4.13-15:35->MD+)|Michael Welling|project=oe 4,oe 5,mw,InProgress,md}} |
| − | + | SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of devices. SPI requires four lines per slave device connection three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CS) are used to determine which device is the target for communication. | |
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| + | The MISO (Master In Slave Out) line is a input signal to the SPI master controller which provides serial data from a slave SPI device. | ||
| + | The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial serial data to a slave SPI device. | ||
| + | SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines. | ||
| + | For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller. | ||
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| + | For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus | ||
Revision as of 15:31, 26 December 2013
SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of devices. SPI requires four lines per slave device connection three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CS) are used to determine which device is the target for communication.
The MISO (Master In Slave Out) line is a input signal to the SPI master controller which provides serial data from a slave SPI device.
The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial serial data to a slave SPI device.
SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines.
For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller.
For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
