Difference between revisions of "EMAC SPI Programming"

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{{todo|Write SPI Article; (12.4.13-15:35->MD+)|Michael Welling|project=oe 4,oe 5,mw,InProgress,md,mg}}
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{{todo|SEOKWTODO; This is too sparse. (12.4.13-15:35->MD+);(12.26.13-19:24->MW+);(12.27.13-11:30->MG+);(12.30.13->15:15->MD+);(2.24.14-12:20->MD-);(03.04.14-16:30->BS-);(03.26.14-17:00->BS+);(06.11.14-17:50->MD-)|Michael Welling|project=oe 4,oe 5,mw,md,mg,bs,Buggy}}
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{{#seo:
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|title=EMAC SPI Programming
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|titlemode=append
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|keywords=EMAC,SPI Programming,SPI Class Devices
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|description=Programming SPI device.
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}}
 
=== Background Information ===
 
=== Background Information ===
 
SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of memory and I/O devices. SPI requires four lines per slave device connection, three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CSn) are used to determine which device is the target for communication.
 
SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of memory and I/O devices. SPI requires four lines per slave device connection, three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CSn) are used to determine which device is the target for communication.
  
  
The MISO (Master In Slave Out) line is a input signal to the SPI master controller which provides serial data from a slave SPI device.
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The MISO (Master In Slave Out) line is an input signal to the SPI master controller which provides serial data from a slave SPI device.
 
The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial data to a slave SPI device.
 
The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial data to a slave SPI device.
 
SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines.  
 
SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines.  
The SPI protocol uses both edges of the synchronous clock to drive the transaction on the bus. The leading transition is use to toggle the output of the MOSI while the trailing transition latches the output of MISO. The phase and polarity (CPHA and CPOL) parameters of the SCLK are used to determine the SPI Mode being used.   
+
The SPI protocol uses both edges of the synchronous clock to drive the transaction on the bus. The leading transition is used to toggle the output of the MOSI while the trailing transition latches the output of MISO. The phase and polarity (CPHA and CPOL) parameters of the SCLK are used to determine the SPI Mode being used.   
 
For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller.
 
For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller.
  
Line 13: Line 20:
 
For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
 
For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
  
This article pertains to the usage of the EMAC SPI class driver. The SPI class was developed to abstract the SPI interface such that it could be accessed from Linux user space and real-time applications. Much of the development occurred before the spidev driver was introduced in the Linux kernel. Though spidev provides a similar interface they are not compatible.
+
This article pertains to the usage of the EMAC SPI class driver. The SPI class was developed to abstract the SPI interface such that it could be accessed from Linux user space and real-time applications. Much of the development occurred before the <code>spidev</code> driver was introduced in the Linux kernel. Though <code>spidev</code> provides a similar interface, it is not compatible with the EMAC driver.
  
For more information on the Linux spidev driver implementation see:
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For more information on the Linux <code>spidev</code> driver implementation, see:
 
https://www.kernel.org/doc/Documentation/spi/spidev
 
https://www.kernel.org/doc/Documentation/spi/spidev
  
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</syntaxhighlight>
 
</syntaxhighlight>
  
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The mode of the SCLK as well as the bits per transaction can be changed using the '''CONFWRITE''' <code>ioctl</code> command.
  
The mode of the SCLK as well as the bits per transaction can be changed using the '''CONFWRITE''' <code>ioctl</code> command.
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For instance, to set the SPI interface for 8 bits mode 3 (CPHA=1 CPOL=1) the following <code>ioctl</code> command will be issued:
  
For instance, to set the SPI interface for 8 bits mode 3 (CPHA=1 CPOL=1) the follow <code>ioctl</code> command will be issued:
 
 
<syntaxhighlight lang="c">
 
<syntaxhighlight lang="c">
 
#include "spi_char.h"
 
#include "spi_char.h"
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ret = ioctl(fd, CONFWRITE, &config);
 
ret = ioctl(fd, CONFWRITE, &config);
 
</syntaxhighlight>
 
</syntaxhighlight>
{{imbox | type=notice | text=The spi_char.h file which defines the ioctls and data structures used for the interface is include with the SPI demo program in the EMAC SDK. }}
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The frequency of the SCLK is defined by kernel registration but it can also be configured using '''SPEEDWRITE''' <code>ioctl</code>.  
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 +
{{imbox | type=notice | style = margin-bottom: 1em; | text=The spi_char.h file which defines the ioctls and data structures used for the interface is included with the SPI demo program in the EMAC SDK. }}
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 +
The frequency of the SCLK is defined by kernel registration, but can also be configured using the '''SPEEDWRITE''' <code>ioctl</code>.  
  
 
For example, to set the SCLK to 1MHz:
 
For example, to set the SCLK to 1MHz:
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The speed and configuration can be read in a similar way using the '''SPEEDREAD''' and '''CONFREAD''' <code>ioctl</code> commands respectively.  
 
The speed and configuration can be read in a similar way using the '''SPEEDREAD''' and '''CONFREAD''' <code>ioctl</code> commands respectively.  
  
For example reading the speed is done as follows:
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For example, reading the speed is done as follows:
 
<syntaxhighlight lang="c">
 
<syntaxhighlight lang="c">
 
#include "spi_char.h"
 
#include "spi_char.h"
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int ret;
 
int ret;
 
spi_transfer_t data;
 
spi_transfer_t data;
__u8 moso[TRANS_LEN];
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__u8 mosi[TRANS_LEN];
 
__u8 miso[TRANS_LEN];
 
__u8 miso[TRANS_LEN];
  
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mosi[2] = 0xFA;
 
mosi[2] = 0xFA;
 
mosi[3] = 0xCE;
 
mosi[3] = 0xCE;
date.mosi = mosi;
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data.mosi = mosi;
 
data.miso = miso;
 
data.miso = miso;
 
     ⋮
 
     ⋮
 
ret = ioctl(fd, XMIT,&data);</syntaxhighlight>
 
ret = ioctl(fd, XMIT,&data);</syntaxhighlight>

Latest revision as of 17:53, 11 June 2014

TODO: {{#todo:SEOKWTODO; This is too sparse. (12.4.13-15:35->MD+);(12.26.13-19:24->MW+);(12.27.13-11:30->MG+);(12.30.13->15:15->MD+);(2.24.14-12:20->MD-);(03.04.14-16:30->BS-);(03.26.14-17:00->BS+);(06.11.14-17:50->MD-)|Michael Welling|oe 4,oe 5,mw,md,mg,bs,Buggy}}

Background Information

SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of memory and I/O devices. SPI requires four lines per slave device connection, three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CSn) are used to determine which device is the target for communication.


The MISO (Master In Slave Out) line is an input signal to the SPI master controller which provides serial data from a slave SPI device. The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial data to a slave SPI device. SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines. The SPI protocol uses both edges of the synchronous clock to drive the transaction on the bus. The leading transition is used to toggle the output of the MOSI while the trailing transition latches the output of MISO. The phase and polarity (CPHA and CPOL) parameters of the SCLK are used to determine the SPI Mode being used. For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller.


For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

This article pertains to the usage of the EMAC SPI class driver. The SPI class was developed to abstract the SPI interface such that it could be accessed from Linux user space and real-time applications. Much of the development occurred before the spidev driver was introduced in the Linux kernel. Though spidev provides a similar interface, it is not compatible with the EMAC driver.

For more information on the Linux spidev driver implementation, see: https://www.kernel.org/doc/Documentation/spi/spidev

Accessing EMAC SPI Class Devices

Each device that uses an EMAC SPI Class driver exposes a character interface to the Linux user space. Once properly registered the device node can be accessed directly using a C program.

To open the SPI Class device node, use the standard C open command:

int fd;
    
fd = open("/dev/spi0cs1", O_RDWR);

The mode of the SCLK as well as the bits per transaction can be changed using the CONFWRITE ioctl command.

For instance, to set the SPI interface for 8 bits mode 3 (CPHA=1 CPOL=1) the following ioctl command will be issued:

#include "spi_char.h"
    
int ret;
struct spi_control config = SPICL_EIGHTBIT | SPICL_CPHA | SPICL_CPOL;
    
ret = ioctl(fd, CONFWRITE, &config);


The frequency of the SCLK is defined by kernel registration, but can also be configured using the SPEEDWRITE ioctl.

For example, to set the SCLK to 1MHz:

#include "spi_char.h"
    
int ret;
struct spi_control speed = 1000000;
    
ret = ioctl(fd, SPEEDWRITE, &speed);

The speed and configuration can be read in a similar way using the SPEEDREAD and CONFREAD ioctl commands respectively.

For example, reading the speed is done as follows:

#include "spi_char.h"
    
int ret;
struct spi_control speed;
    
ret = ioctl(fd, SPEEDWRITE, &speed);
printf("The clock frequency is %d Hz\n", speed);

After configuring the SPI device, data can be transferred using the XMIT ioctl.

#include "spi_char.h"
#define TRANS_LEN 4
    
int ret;
spi_transfer_t data;
__u8 mosi[TRANS_LEN];
__u8 miso[TRANS_LEN];

    
data.size = TRANS_LEN;
mosi[0] = 0xF0;
mosi[1] = 0x0D;
mosi[2] = 0xFA;
mosi[3] = 0xCE;
data.mosi = mosi;
data.miso = miso;
    
ret = ioctl(fd, XMIT,&data);