Example SPI test

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TODO: {{#todo:In Progress|Brian Serrano|oe 4,oe 5,md,InProgress,bs}}

This is a guide to the spi_test example project included in the EMAC OE SDK.

SPI (Serial Peripheral Interface) is a synchronous full duplex serial data communication standard used to interface many types of memory and I/O devices. SPI requires four lines per slave device connection, three of which are shared across the SPI bus. MISO, MOSI and SCLK are the three shared bus lines and chip selects (CSn) are used to determine which device is the target for communication.

The MISO (Master In Slave Out) line is an input signal to the SPI master controller which provides serial data from a slave SPI device.The MOSI (Master Out Slave In) line is an output signal from the SPI master providing serial data to a slave SPI device.SCLK (Synchronous Clock) is an output clock from the SPI master controller used to synchronize the data on the MISO and MOSI lines. The SPI protocol uses both edges of the synchronous clock to drive the transaction on the bus. The leading transition is used to toggle the output of the MOSI while the trailing transition latches the output of MISO. The phase and polarity (CPHA and CPOL) parameters of the SCLK are used to determine the SPI Mode being used. For each slave device there is a chip select output signal from the SPI master controller. Each SPI slave uses the chip select to determine when to communicate back to the SPI master controller

This procedure provides an overview of how to compile and run the spi_test C example project. This is an example test interface for sending a transaction to an EMAC SPI device interface. It is only relevant if the EMAC SPI device interface is enabled for an external SPI device that is connected to the bus. It assumes familiarity with the C programming language and is intended to be used by experienced programmers who are looking to learn the EMAC SDK.

For more information about the SPI protocol see the following page: http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus